CHERIoT RTOS
A compartmentalised RTOS for CHERIoT hardware
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SonataSpi::Generic< NumChipSelects > Struct Template Reference

A driver for the Sonata's SPI device block. More...

#include <platform-spi.hh>

Inheritance diagram for SonataSpi::Generic< NumChipSelects >:
Collaboration diagram for SonataSpi::Generic< NumChipSelects >:

Public Types

using Debug = ConditionalDebug<DebugSonataSpi, "Sonata SPI">
 Helper for conditional debug logs and assertions.

Public Member Functions

void interrupt_enable (Interrupt interrupt) volatile
 Enable the given interrupt(s).
void interrupt_disable (Interrupt interrupt) volatile
 Disable the given interrupt(s).
void init (const bool ClockPolarity, const bool ClockPhase, const bool MsbFirst, const uint16_t HalfClockPeriod) volatile
 Initialises the SPI block.
void wait_idle () volatile
 Waits for the SPI device to become idle.
void blocking_write (const uint8_t data[], uint16_t len) volatile
 Sends len bytes from the given data buffer, where len is at most 0x7ff.
void blocking_read (uint8_t data[], uint16_t len) volatile
template<uint8_t Index, bool DeassertOthers = true>
void chip_select_assert (const bool Assert=true) volatile
 Asserts/de-asserts a given chip select.

Public Attributes

uint32_t interruptState
 The current state of the SPI interrupts.
uint32_t interruptEnable
 Controls which interrupts are enabled.
uint32_t interruptTest
 Allows one to manually trigger an interrupt for testing.
uint32_t configuration
 Configuration register.
uint32_t control
 Controls the operation of the SPI block.
uint32_t status
 Status information about the SPI block.
uint32_t start
 Writes to this begin an SPI operation.
uint32_t receiveFifo
 Data from the receive FIFO.
uint32_t transmitFifo
 Bytes written here are pushed to the transmit FIFO.
uint32_t info
 Information about the SPI controller.
uint32_t chipSelects
 Chip Select lines; each bit controls a chip select line.

Static Public Attributes

static constexpr bool DebugSonataSpi = false
 Flag set when we're debugging this driver.

Detailed Description

template<size_t NumChipSelects = 4>
struct SonataSpi::Generic< NumChipSelects >

A driver for the Sonata's SPI device block.

Documentation source can be found at: https://github.com/lowRISC/sonata-system/blob/1a59633d2515d4fe186a07d53e49ff95c18d9bbf/doc/ip/spi.md

Rendered documentation is served from: https://lowrisc.org/sonata-system/doc/ip/spi.html

Definition at line 147 of file platform-spi.hh.

Member Typedef Documentation

◆ Debug

template<size_t NumChipSelects = 4>
using SonataSpi::Generic< NumChipSelects >::Debug = ConditionalDebug<DebugSonataSpi, "Sonata SPI">

Helper for conditional debug logs and assertions.

Definition at line 199 of file platform-spi.hh.

Member Function Documentation

◆ blocking_read()

template<size_t NumChipSelects = 4>
void SonataSpi::Generic< NumChipSelects >::blocking_read ( uint8_t data[],
uint16_t len ) volatile
inline

Definition at line 301 of file platform-spi.hh.

◆ blocking_write()

template<size_t NumChipSelects = 4>
void SonataSpi::Generic< NumChipSelects >::blocking_write ( const uint8_t data[],
uint16_t len ) volatile
inline

Sends len bytes from the given data buffer, where len is at most 0x7ff.

Definition at line 264 of file platform-spi.hh.

References control, start, status, transmitFifo, and wait_idle().

◆ chip_select_assert()

template<size_t NumChipSelects = 4>
template<uint8_t Index, bool DeassertOthers = true>
void SonataSpi::Generic< NumChipSelects >::chip_select_assert ( const bool Assert = true) volatile
inline

Asserts/de-asserts a given chip select.

Note, SPI chip selects are active low signals, so the register bit is zero when asserted and one when de-asserted.

Template Parameters
IndexThe index of the chip select to be set.
DeassertOthersWhether to de-assert all other chip selects.
Parameters
AssertWhether to assert (true) or de-assert (false).

Definition at line 336 of file platform-spi.hh.

References chipSelects.

Referenced by SonataSpi::EthernetMac::chip_select_assert(), SonataSpi::Lcd::chip_select_assert(), SonataSpi::Lcd::data_command_set(), SonataSpi::EthernetMac::reset_assert(), and SonataSpi::Lcd::reset_assert().

◆ init()

template<size_t NumChipSelects = 4>
void SonataSpi::Generic< NumChipSelects >::init ( const bool ClockPolarity,
const bool ClockPhase,
const bool MsbFirst,
const uint16_t HalfClockPeriod ) volatile
inline

Initialises the SPI block.

Parameters
ClockPolarityWhen false, the clock is low when idle and the leading edge is positive. When true, the opposite behaviour is set.
ClockPhaseWhen false, data is sampled on the leading edge and changes on the trailing edge. When true, the opposite behaviour is set.
MsbFirstWhen true, the first bit of each byte sent is the most significant bit, as oppose to the least significant bit.
HalfClockPeriodThe length of a half period of the SPI clock, measured in system clock cycles reduced by 1.

Definition at line 227 of file platform-spi.hh.

References configuration, and control.

◆ interrupt_disable()

template<size_t NumChipSelects = 4>
void SonataSpi::Generic< NumChipSelects >::interrupt_disable ( Interrupt interrupt) volatile
inline

Disable the given interrupt(s).

Definition at line 208 of file platform-spi.hh.

References interruptEnable.

◆ interrupt_enable()

template<size_t NumChipSelects = 4>
void SonataSpi::Generic< NumChipSelects >::interrupt_enable ( Interrupt interrupt) volatile
inline

Enable the given interrupt(s).

Definition at line 202 of file platform-spi.hh.

References interruptEnable.

◆ wait_idle()

template<size_t NumChipSelects = 4>
void SonataSpi::Generic< NumChipSelects >::wait_idle ( ) volatile
inline

Waits for the SPI device to become idle.

Definition at line 252 of file platform-spi.hh.

References status.

Referenced by blocking_write().

Member Data Documentation

◆ chipSelects

template<size_t NumChipSelects = 4>
uint32_t SonataSpi::Generic< NumChipSelects >::chipSelects

Chip Select lines; each bit controls a chip select line.

When a bit set to zero, a chip select line is pulled low. Multiple chip select lines can be pulled low at a time.

Definition at line 193 of file platform-spi.hh.

Referenced by chip_select_assert().

◆ configuration

template<size_t NumChipSelects = 4>
uint32_t SonataSpi::Generic< NumChipSelects >::configuration

Configuration register.

Controls how the SPI block transmits and receives data. This register can be modified only whilst the SPI block is idle.

Definition at line 160 of file platform-spi.hh.

Referenced by init().

◆ control

template<size_t NumChipSelects = 4>
uint32_t SonataSpi::Generic< NumChipSelects >::control

Controls the operation of the SPI block.

This register can be modified only whilst the SPI block is idle.

Definition at line 165 of file platform-spi.hh.

Referenced by blocking_write(), and init().

◆ DebugSonataSpi

template<size_t NumChipSelects = 4>
bool SonataSpi::Generic< NumChipSelects >::DebugSonataSpi = false
staticconstexpr

Flag set when we're debugging this driver.

Definition at line 196 of file platform-spi.hh.

◆ info

template<size_t NumChipSelects = 4>
uint32_t SonataSpi::Generic< NumChipSelects >::info

Information about the SPI controller.

This register reports the depths of the transmit and receive FIFOs within the controller.

Definition at line 187 of file platform-spi.hh.

◆ interruptEnable

template<size_t NumChipSelects = 4>
uint32_t SonataSpi::Generic< NumChipSelects >::interruptEnable

Controls which interrupts are enabled.

Definition at line 152 of file platform-spi.hh.

Referenced by interrupt_disable(), and interrupt_enable().

◆ interruptState

template<size_t NumChipSelects = 4>
uint32_t SonataSpi::Generic< NumChipSelects >::interruptState

The current state of the SPI interrupts.

Definition at line 150 of file platform-spi.hh.

◆ interruptTest

template<size_t NumChipSelects = 4>
uint32_t SonataSpi::Generic< NumChipSelects >::interruptTest

Allows one to manually trigger an interrupt for testing.

Definition at line 154 of file platform-spi.hh.

◆ receiveFifo

template<size_t NumChipSelects = 4>
uint32_t SonataSpi::Generic< NumChipSelects >::receiveFifo

Data from the receive FIFO.

When read the data is popped from the FIFO. If the FIFO is empty data read is undefined.

Definition at line 177 of file platform-spi.hh.

◆ start

template<size_t NumChipSelects = 4>
uint32_t SonataSpi::Generic< NumChipSelects >::start

Writes to this begin an SPI operation.

Writes are ignored when the SPI block is active.

Definition at line 172 of file platform-spi.hh.

Referenced by blocking_write().

◆ status

template<size_t NumChipSelects = 4>
uint32_t SonataSpi::Generic< NumChipSelects >::status

Status information about the SPI block.

Definition at line 167 of file platform-spi.hh.

Referenced by blocking_write(), and wait_idle().

◆ transmitFifo

template<size_t NumChipSelects = 4>
uint32_t SonataSpi::Generic< NumChipSelects >::transmitFifo

Bytes written here are pushed to the transmit FIFO.

If the FIFO is full writes are ignored.

Definition at line 182 of file platform-spi.hh.

Referenced by blocking_write().


The documentation for this struct was generated from the following file: