CHERIoT RTOS
A compartmentalised RTOS for CHERIoT hardware
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platform-switcher_cpu_features.inc
1// Copyright SCI Semiconductor and CHERIoT Contributors.
2// SPDX-License-Identifier: MIT
3
4#pragma once
5
6#include "platform-switcher_cpu_features.hh"
7
8/// A mask of all bits that can be set in cpuFeatures
9# define SWITCHER_CPU_FEATURE_PLATFORM_MASK \
10 (IbexCSR_Cpuctrlsts_IcacheEnable | \
11 IbexCSR_Cpuctrlsts_DataIndependentTiming)
12
13// clang-format off
14
15.macro platform_switcher_cpu_features_activate newValue, scratch
16 // Mask out bits not available for user control
17 andi \newValue, \newValue, SWITCHER_CPU_FEATURE_PLATFORM_MASK
18
19 // OR those in with the other bits in the register and write
20 csrr \scratch, IbexCSR_Cpuctrlsts_index
21 andi \scratch, \scratch, ~SWITCHER_CPU_FEATURE_PLATFORM_MASK
22 or \scratch, \scratch, \newValue
23 csrw IbexCSR_Cpuctrlsts_index, \scratch
24
25 // Read back the bits available for user control
26 csrr \newValue, IbexCSR_Cpuctrlsts_index
27 andi \newValue, \newValue, SWITCHER_CPU_FEATURE_PLATFORM_MASK
28.endm
29
30.macro platform_switcher_cpu_features_reactivate newValue, scratch
31 // newValue is known to be masked, so just RMW the CSR
32 csrr \scratch, IbexCSR_Cpuctrlsts_index
33 andi \scratch, \scratch, ~SWITCHER_CPU_FEATURE_PLATFORM_MASK
34 or \scratch, \scratch, \newValue
35 csrw IbexCSR_Cpuctrlsts_index, \scratch
36.endm
37
38// clang-format on
#define IbexCSR_Cpuctrlsts_index
Index of the cpuctrlsts CSR.
Definition ibex-csr.h:39