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CHERIoT RTOS
A compartmentalised RTOS for CHERIoT hardware
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Driver for the OpenTitan's I2C block. More...
#include <platform-i2c.hh>


Public Member Functions | |
| uint32_t | reset_controller_events () volatile |
| Reset the controller Events so that the ControllerHalt interrupt will be released, allowing the I2C driver to continue after the controller FSM has halted due to e.g. | |
| void | reset_fifos () volatile |
| Reset all of the fifos. | |
| void | host_mode_set () volatile |
| Configure the I2C block to be in host mode. | |
| void | speed_set (const uint32_t SpeedKhz) volatile |
| Set the I2C timing parameters appropriately for the given bit rate. | |
| void | blocking_write_byte (const uint32_t Fmt) volatile |
| bool | format_is_empty () volatile |
| Returns true when the format fifo is empty. | |
| bool | blocking_write (const uint8_t Addr7, const uint8_t data[], const uint32_t NumBytes, const bool SkipStop) volatile |
| bool | blocking_read (const uint8_t Addr7, uint8_t buf[], const uint32_t NumBytes) volatile |
| bool | interrupt_is_asserted (Interrupt interrupt) volatile |
| Returns true if the given interrupt is asserted. | |
| void | interrupt_clear (Interrupt interrupt) volatile |
| Clears the given interrupt. | |
| void | interrupt_enable (Interrupt interrupt) volatile |
| Enables the given interrupt. | |
| void | interrupt_disable (Interrupt interrupt) volatile |
| Disables the given interrupt. | |
| void | host_thresholds_set (uint16_t formatThreshold, uint16_t receiveThreshold) volatile |
| Sets the thresholds for the format and receive fifos. | |
| void | reset_fifos () volatile |
| Reset all of the fifos. | |
| void | host_mode_set () volatile |
| Configure the I2C block to be in host mode. | |
| void | speed_set (const uint32_t SpeedKhz) volatile |
| Set the I2C timing parameters appropriately for the given bit rate. | |
| void | blocking_write_byte (const uint32_t Fmt) volatile |
| bool | format_is_empty () volatile |
| Returns true when the format fifo is empty. | |
| void | blocking_write (const uint8_t Addr7, const uint8_t data[], const uint32_t NumBytes, const bool SkipStop) volatile |
| bool | blocking_read (const uint8_t Addr7, uint8_t buf[], const uint32_t NumBytes) volatile |
| bool | interrupt_is_asserted (OpenTitanI2cInterrupt interrupt) volatile |
| Returns true if the given interrupt is asserted. | |
| void | interrupt_clear (OpenTitanI2cInterrupt interrupt) volatile |
| Clears the given interrupt. | |
| void | interrupt_enable (OpenTitanI2cInterrupt interrupt) volatile |
| Enables the given interrupt. | |
| void | interrupt_disable (OpenTitanI2cInterrupt interrupt) volatile |
| Disables the given interrupt. | |
| void | host_thresholds_set (uint16_t formatThreshold, uint16_t receiveThreshold) volatile |
| Sets the thresholds for the format and receive fifos. | |
Static Public Member Functions | |
| static constexpr uint32_t | interrupt_bit (const InterruptInterrupt InterruptInterrupt) |
| static uint16_t | round_up_divide (uint32_t a, uint32_t b) |
| Performs a 32-bit integer unsigned division, rounding up. | |
| static uint16_t | round_up_divide (uint32_t a, uint32_t b) |
| Performs a 32-bit integer unsigned division, rounding up. | |
Public Attributes | |
| uint32_t | interruptState |
| Interrupt State Register. | |
| uint32_t | interruptEnable |
| Interrupt Enable Register. | |
| uint32_t | interruptTest |
| Interrupt Test Register. | |
| uint32_t | alertTest |
| Alert Test Register (Unused in Sonata). | |
| uint32_t | control |
| I2C Control Register. | |
| uint32_t | status |
| I2C Live Status Register for Host and Target modes. | |
| uint32_t | readData |
| I2C Read Data. | |
| uint32_t | formatData |
| I2C Host Format Data. | |
| uint32_t | fifoCtrl |
| I2C FIFO control register. | |
| uint32_t | hostFifoConfiguration |
| Host mode FIFO configuration. | |
| uint32_t | targetFifoConfiguration |
| Target mode FIFO configuration. | |
| uint32_t | hostFifoStatus |
| Host mode FIFO status register. | |
| uint32_t | targetFifoStatus |
| Target mode FIFO status register. | |
| uint32_t | override |
| I2C Override Control Register. | |
| uint32_t | values |
| Oversampled Receive values. | |
| uint32_t | timing [5] |
| Detailed I2C Timings (directly corresponding to table 10 in the I2C Specification). | |
| uint32_t | timeoutControl |
| I2C clock stretching timeout control. | |
| uint32_t | targetId |
| I2C target address and mask pairs. | |
| uint32_t | acquiredData |
| I2C target acquired data. | |
| uint32_t | transmitData |
| I2C target transmit data. | |
| uint32_t | hostTimeoutControl |
| I2C host clock generation timeout value (in units of input clock frequency). | |
| uint32_t | targetTimeoutControl |
| I2C target internal stretching timeout control. | |
| uint32_t | targetNackCount |
| Number of times the I2C target has NACK'ed a new transaction since the last read of this register. | |
| uint32_t | targetAckControl |
| Controls for mid-transfer (N)ACK phase handling. | |
| uint32_t | acquireFifoNextData |
| The data byte pending to be written to the Acquire (ACQ) FIFO. | |
| uint32_t | hostNackHandlerTimeout |
| Timeout in Host-Mode for an unhandled NACK before hardware automatically ends the transaction. | |
| uint32_t | controllerEvents |
| Latched events that explain why the controller halted. | |
| uint32_t | targetEvents |
| Latched events that can cause the target module to stretch the clock at the beginning of a read transfer. | |
Static Public Attributes | |
| static constexpr uint32_t | ReceiveFifoDepth = 8 |
| static constexpr bool | DebugOpenTitanI2c = false |
| Flag set when we're debugging this driver. | |
Driver for the OpenTitan's I2C block.
Documentation source can be found at: https://github.com/lowRISC/opentitan/tree/4fe1b8dd1a09af9dbc242434481ae031955dfd85/hw/ip/i2c
Documentation source can be found at: https://github.com/lowRISC/opentitan/tree/9ddf276c64e2974ed8e528e8b2feb00b977861de/hw/ip/i2c
Definition at line 13 of file platform-i2c.hh.
| using OpenTitanI2c::Debug = ConditionalDebug<DebugOpenTitanI2c, "OpenTitan I2C"> |
Helper for conditional debug logs and assertions.
Definition at line 302 of file platform-i2c.hh.
| using OpenTitanI2c::Debug = ConditionalDebug<DebugOpenTitanI2c, "OpenTitan I2C"> |
Helper for conditional debug logs and assertions.
Definition at line 240 of file platform-i2c.hh.
| anonymous enum : uint32_t |
ControllerEvents Register Fields.
| Enumerator | |
|---|---|
| ControllerEventsNack | Controller FSM is halted due to receiving an unexpected NACK. |
| ControllerEventsUnhandledNackTimeout | Controller FSM is halted due to a Host-Mode active transaction being ended by the hostNackHandlerTimeout mechanism. |
| ControllerEventsBusTimeout | Controller FSM is halted due to a Host-Mode active transaction being terminated because of a bus timeout activated by timeoutControl. |
| ControllerEventsArbitrationLost | Controller FSM is halted due to a Host-Mode active transaction being terminated because of lost arbitration. |
Definition at line 274 of file platform-i2c.hh.
| anonymous enum : uint32_t |
FifoControl Register Fields.
Definition at line 258 of file platform-i2c.hh.
| anonymous enum : uint32_t |
FifoControl Register Fields.
Definition at line 225 of file platform-i2c.hh.
| anonymous enum : uint32_t |
Status Register Fields.
Definition at line 178 of file platform-i2c.hh.
| anonymous enum : uint32_t |
FormatData Register Fields.
Definition at line 240 of file platform-i2c.hh.
| anonymous enum : uint32_t |
FormatData Register Fields.
Definition at line 208 of file platform-i2c.hh.
| anonymous enum : uint32_t |
Control Register Fields.
| Enumerator | |
|---|---|
| ControlEnableHost | Enable Host I2C functionality. |
| ControlEnableTarget | Enable Target I2C functionality. |
| ControlLineLoopback | Enable I2C line loopback test If line loopback is enabled, the internal design sees ACQ and RX data as "1". |
| ControlNackAddressAfterTimeout | Enable NACKing the address on a stretch timeout. This is a target mode feature. If enabled, a stretch timeout will cause the device to NACK the address byte. If disabled, it will ACK instead. |
| ControlAckControlEnable | Enable ACK Control Mode, which works with the targetAckControl register to allow software to control upper-layer (N)ACKing. |
| ControlMultiControllerMonitorEnable | Enable the bus monitor in multi-controller mode. |
| ControlTransmitStretchEnable | If set, causes a read transfer addressed to the this target to set the corresponding bit in the targetEvents register. While the transmitPending field is 1, subsequent read transactions will stretch the clock, even if there is data in the Transmit FIFO. |
Definition at line 186 of file platform-i2c.hh.
| anonymous enum : uint32_t |
Status Register Fields.
| Enumerator | |
|---|---|
| StatusFormatFull | Host mode Format FIFO is full. |
| StatusReceiveFull | Host mode Receive FIFO is full. |
| StatusFormatEmpty | Host mode Format FIFO is empty. |
| StatusHostIdle | Host functionality is idle. No Host transaction is in progress. |
| StatusTargetIdle | Target functionality is idle. No Target transaction is in progress. |
| SmatusReceiveEmpty | Host mode Receive FIFO is empty. |
| StatusTransmitFull | Target mode Transmit FIFO is full. |
| StatusAcquiredFull | Target mode Acquired FIFO is full. Target mode Receive FIFO is full. |
| StatusTransmitEmpty | Target mode Transmit FIFO is empty. |
| StatusAcquiredEmpty | Target mode Acquired FIFO is empty. Target mode Aquired FIFO is empty. |
| StatusAckControlStretch | Target mode stretching at (N)ACK phase due to zero count in the targetAckControl register. |
Definition at line 212 of file platform-i2c.hh.
| anonymous enum : uint32_t |
Control Register Fields.
Definition at line 167 of file platform-i2c.hh.
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strong |
The interrupts of the OpenTitan's I2C block.
Documentation source can be found at: https://github.com/lowRISC/opentitan/blob/4fe1b8dd1a09af9dbc242434481ae031955dfd85/hw/ip/i2c/doc/interfaces.md
| Enumerator | |
|---|---|
| FormatThreshold | A host mode interrupt. This is asserted whilst the Format FIFO level is below the low threshold. This is a level status interrupt. |
| ReceiveThreshold | A host mode interrupt. This is asserted whilst the Receive FIFO level is above the high threshold. This is a level status interrupt. |
| AcquiredThreshold | A target mode interrupt. This is asserted whilst the Aquired FIFO level is above the high threshold. This is a level status interrupt. |
| ReceiveOverflow | A host mode interrupt. This is raised if the Receive FIFO has overflowed. |
| ControllerHalt | A host mode interrupt. This is raised if the controller FSM is halted, such as on an unexpected NACK or lost arbitration. Check the controllerEvents register for the reason. The interrupt will only be released when the bits in controllerEvents are cleared. |
| SclInterference | A host mode interrupt. This is raised if the SCL line drops early (not supported without clock synchronization). |
| SdaInterference | A host mode interrupt. This is raised if the SDA line goes low when host is trying to assert high. |
| StretchTimeout | A host mode interrupt. This is raised if target stretches the clock beyond the allowed timeout period. |
| SdaUnstable | A host mode interrupt. This is raised if the target does not assert a constant value of SDA during transmission. |
| CommandComplete | A host and target mode interrupt. In host mode, raised if the host issues a repeated START or terminates the transaction by issuing STOP. In target mode, raised if the external host issues a STOP or repeated START. |
| TransmitStretch | A target mode interrupt. This is raised if the target is stretching clocks for a read command. This is a level status interrupt. |
| TransmitThreshold | A target mode interrupt. This is asserted whilst the Transmit FIFO level is below the low threshold. This is a level status interrupt. |
| AcquiredFull | A target mode interrupt. This is raised if the target is stretching clocks due to full Aquired FIFO or zero count in targetAckControl.NBYTES (if enabled). This is a level status interrupt. |
| UnexpectedStop | A target mode interrupt. This is raised if STOP is received without a preceding NACK during an external host read. |
| HostTimeout | A target mode interrupt. This is raised if the host stops sending the clock during an ongoing transaction. |
Definition at line 95 of file platform-i2c.hh.
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inlinenodiscard |
Definition at line 450 of file platform-i2c.hh.
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inlinenodiscard |
Definition at line 357 of file platform-i2c.hh.
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inlinenodiscard |
Definition at line 423 of file platform-i2c.hh.
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inline |
Definition at line 339 of file platform-i2c.hh.
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Definition at line 409 of file platform-i2c.hh.
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inline |
Definition at line 327 of file platform-i2c.hh.
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Returns true when the format fifo is empty.
Definition at line 418 of file platform-i2c.hh.
References status, and StatusFormatEmpty.
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inlinenodiscard |
Returns true when the format fifo is empty.
Definition at line 334 of file platform-i2c.hh.
References status, and StatusFormatEmpty.
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Configure the I2C block to be in host mode.
Definition at line 350 of file platform-i2c.hh.
References control, and ControlEnableHost.
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Configure the I2C block to be in host mode.
Definition at line 268 of file platform-i2c.hh.
References control, and ControlEnableHost.
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Sets the thresholds for the format and receive fifos.
Definition at line 511 of file platform-i2c.hh.
References hostFifoConfiguration.
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Sets the thresholds for the format and receive fifos.
Definition at line 415 of file platform-i2c.hh.
References hostFifoConfiguration.
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inlinestaticconstexpr |
Definition at line 180 of file platform-i2c.hh.
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inline |
Clears the given interrupt.
Definition at line 491 of file platform-i2c.hh.
References interruptState.
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Clears the given interrupt.
Definition at line 395 of file platform-i2c.hh.
References interruptState.
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Disables the given interrupt.
Definition at line 503 of file platform-i2c.hh.
References interruptEnable.
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Disables the given interrupt.
Definition at line 407 of file platform-i2c.hh.
References interruptEnable.
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Enables the given interrupt.
Definition at line 497 of file platform-i2c.hh.
References interruptEnable.
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inline |
Enables the given interrupt.
Definition at line 401 of file platform-i2c.hh.
References interruptEnable.
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Returns true if the given interrupt is asserted.
Definition at line 485 of file platform-i2c.hh.
References interruptState.
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inlinenodiscard |
Returns true if the given interrupt is asserted.
Definition at line 389 of file platform-i2c.hh.
References interruptState.
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inline |
Reset the controller Events so that the ControllerHalt interrupt will be released, allowing the I2C driver to continue after the controller FSM has halted due to e.g.
a NACK, configured timeout, or loss of arbitration.
Returns the (masked) result of reading the register before clearing the controller events, so that you can use the controllerEvent register fields to determine why the Controller FSM was halted.
Definition at line 332 of file platform-i2c.hh.
References controllerEvents, ControllerEventsArbitrationLost, ControllerEventsBusTimeout, ControllerEventsNack, and ControllerEventsUnhandledNackTimeout.
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inline |
Reset all of the fifos.
Definition at line 343 of file platform-i2c.hh.
References FifoControlAcquiredReset, FifoControlFormatReset, FifoControlReceiveReset, FifoControlTransmitReset, and fifoCtrl.
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Reset all of the fifos.
Definition at line 261 of file platform-i2c.hh.
References FifoControlAcquiredReset, FifoControlFormatReset, FifoControlReceiveReset, FifoControlTransmitReset, and fifoCtrl.
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inlinestatic |
Performs a 32-bit integer unsigned division, rounding up.
The bottom 16 bits of the result are then returned.
As usual, a divisor of 0 is still Undefined Behavior.
Definition at line 310 of file platform-i2c.hh.
Referenced by speed_set().
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inlinestatic |
Performs a 32-bit integer unsigned division, rounding up.
The bottom 16 bits of the result are then returned.
As usual, a divisor of 0 is still Undefined Behavior.
Definition at line 248 of file platform-i2c.hh.
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inline |
Set the I2C timing parameters appropriately for the given bit rate.
Distilled from: https://github.com/lowRISC/opentitan/blob/9ddf276c64e2974ed8e528e8b2feb00b977861de/hw/ip/i2c/doc/programmers_guide.md
Definition at line 360 of file platform-i2c.hh.
References round_up_divide(), and timing.
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inline |
Set the I2C timing parameters appropriately for the given bit rate.
Distilled from: https://github.com/lowRISC/opentitan/blob/9ddf276c64e2974ed8e528e8b2feb00b977861de/hw/ip/i2c/doc/programmers_guide.md
Definition at line 278 of file platform-i2c.hh.
References round_up_divide(), and timing.
| uint32_t OpenTitanI2c::acquiredData |
I2C target acquired data.
Definition at line 55 of file platform-i2c.hh.
| uint32_t OpenTitanI2c::acquireFifoNextData |
The data byte pending to be written to the Acquire (ACQ) FIFO.
Definition at line 75 of file platform-i2c.hh.
| uint32_t OpenTitanI2c::alertTest |
Alert Test Register (Unused in Sonata).
Definition at line 22 of file platform-i2c.hh.
| uint32_t OpenTitanI2c::control |
| uint32_t OpenTitanI2c::controllerEvents |
Latched events that explain why the controller halted.
Definition at line 82 of file platform-i2c.hh.
Referenced by reset_controller_events().
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staticconstexpr |
Flag set when we're debugging this driver.
Definition at line 299 of file platform-i2c.hh.
| uint32_t OpenTitanI2c::fifoCtrl |
I2C FIFO control register.
Definition at line 32 of file platform-i2c.hh.
Referenced by reset_fifos().
| uint32_t OpenTitanI2c::formatData |
I2C Host Format Data.
Definition at line 30 of file platform-i2c.hh.
| uint32_t OpenTitanI2c::hostFifoConfiguration |
Host mode FIFO configuration.
Definition at line 34 of file platform-i2c.hh.
Referenced by host_thresholds_set().
| uint32_t OpenTitanI2c::hostFifoStatus |
Host mode FIFO status register.
Definition at line 38 of file platform-i2c.hh.
| uint32_t OpenTitanI2c::hostNackHandlerTimeout |
Timeout in Host-Mode for an unhandled NACK before hardware automatically ends the transaction.
Definition at line 80 of file platform-i2c.hh.
| uint32_t OpenTitanI2c::hostTimeoutControl |
I2C host clock generation timeout value (in units of input clock frequency).
Definition at line 62 of file platform-i2c.hh.
| uint32_t OpenTitanI2c::interruptEnable |
Interrupt Enable Register.
Definition at line 18 of file platform-i2c.hh.
Referenced by interrupt_disable(), interrupt_disable(), interrupt_enable(), and interrupt_enable().
| uint32_t OpenTitanI2c::interruptState |
Interrupt State Register.
Definition at line 16 of file platform-i2c.hh.
Referenced by interrupt_clear(), interrupt_clear(), interrupt_is_asserted(), and interrupt_is_asserted().
| uint32_t OpenTitanI2c::interruptTest |
Interrupt Test Register.
Definition at line 20 of file platform-i2c.hh.
| uint32_t OpenTitanI2c::override |
I2C Override Control Register.
Definition at line 42 of file platform-i2c.hh.
| uint32_t OpenTitanI2c::readData |
I2C Read Data.
Definition at line 28 of file platform-i2c.hh.
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staticconstexpr |
Definition at line 296 of file platform-i2c.hh.
| uint32_t OpenTitanI2c::status |
I2C Live Status Register for Host and Target modes.
Definition at line 26 of file platform-i2c.hh.
Referenced by format_is_empty().
| uint32_t OpenTitanI2c::targetAckControl |
Controls for mid-transfer (N)ACK phase handling.
Timeout in Host-Mode for an unhandled NACK before hardware automatically ends the transaction.
Definition at line 73 of file platform-i2c.hh.
| uint32_t OpenTitanI2c::targetEvents |
Latched events that can cause the target module to stretch the clock at the beginning of a read transfer.
Definition at line 87 of file platform-i2c.hh.
| uint32_t OpenTitanI2c::targetFifoConfiguration |
Target mode FIFO configuration.
Definition at line 36 of file platform-i2c.hh.
| uint32_t OpenTitanI2c::targetFifoStatus |
Target mode FIFO status register.
Definition at line 40 of file platform-i2c.hh.
| uint32_t OpenTitanI2c::targetId |
I2C target address and mask pairs.
Definition at line 53 of file platform-i2c.hh.
| uint32_t OpenTitanI2c::targetNackCount |
Number of times the I2C target has NACK'ed a new transaction since the last read of this register.
Definition at line 69 of file platform-i2c.hh.
| uint32_t OpenTitanI2c::targetTimeoutControl |
I2C target internal stretching timeout control.
Definition at line 64 of file platform-i2c.hh.
| uint32_t OpenTitanI2c::timeoutControl |
I2C clock stretching timeout control.
Definition at line 51 of file platform-i2c.hh.
| uint32_t OpenTitanI2c::timing |
Detailed I2C Timings (directly corresponding to table 10 in the I2C Specification).
Definition at line 49 of file platform-i2c.hh.
Referenced by speed_set().
| uint32_t OpenTitanI2c::transmitData |
I2C target transmit data.
Definition at line 57 of file platform-i2c.hh.
| uint32_t OpenTitanI2c::values |
Oversampled Receive values.
Definition at line 44 of file platform-i2c.hh.