CHERIoT RTOS
A compartmentalised RTOS for CHERIoT hardware
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sdk
include
riscvreg.h
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// Copyright Microsoft and CHERIoT Contributors.
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// SPDX-License-Identifier: MIT
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#pragma once
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#include <stdint.h>
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#define GR_READ(name) \
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({ \
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size_t val; \
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__asm __volatile("mv %0, " #name : "=r"(val)); \
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val; \
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})
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#define GR_WRITE(name, val) \
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({ __asm __volatile("mv " #name ", %0" ::"r"(val)); })
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#define CSR_READ64(csr) \
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({ \
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uint64_t val; \
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uint32_t high, low; \
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__asm __volatile("1: " \
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"csrr t0, " #csr "h\n" \
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"csrr %0, " #csr "\n" \
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"csrr %1, " #csr "h\n" \
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"bne t0, %1, 1b" \
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: "=r"(low), "=r"(high) \
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: \
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: "t0"); \
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val = (low | ((uint64_t)high << 32)); \
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val; \
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})
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// This hack reads the absolute integer address of a symbol.
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#define LA_ABS(symbol) \
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({ \
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size_t val; \
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__asm __volatile("lui %0, %%hi(" #symbol ")\n" \
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"addi %0, %0, %%lo(" #symbol ")" \
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: "=r"(val)); \
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val; \
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})
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#define BARRIER() __asm volatile("" : : : "memory")
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/**
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* Read the cycle counter. Returns the number of cycles since boot as a 64-bit
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* value.
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*/
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static
inline
uint64_t rdcycle64()
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{
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return
CSR_READ64(mcycle);
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}
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