Values less than 32 refer to general purpose registers and others to SCRs (of these, only PCC can actually cause an exception).
| Enumerator |
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| CheriRegisterNumberCzr | The zero register, which always contains the NULL capability.
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| CheriRegisterNumberCra | $c1 / $cra used by the ABI as the return address.
Not preserved across calls.
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| CheriRegisterNumberCsp | $c2 / $csp used by the ABI as the stack pointer.
Preserved across calls.
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| CheriRegisterNumberCgp | $c3 / $cgp used by the ABI as the global pointer.
Not allocatable by the compiler, set by the switcher on compartment entry.
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| CheriRegisterNumberCtp | $c4 / $ctp used by the ABI as the thread pointer.
Currently unused by the compiler. Not preserved across compartment calls.
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| CheriRegisterNumberCT0 | $c5 / $ct0 used by the ABI as temporary register.
Not preserved across calls.
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| CheriRegisterNumberCT1 | $c6 / $ct1 used by the ABI as temporary register.
Not preserved across calls.
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| CheriRegisterNumberCT2 | $c7 / $ct2 used by the ABI as temporary register.
Not preserved across calls.
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| CheriRegisterNumberCS0 | $c8 / $cs0 used by the ABI as a callee-saved register.
Preserved across calls.
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| CheriRegisterNumberCS1 | $c9 / $cs1 used by the ABI as a callee-saved register.
Preserved across calls.
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| CheriRegisterNumberCA0 | $c10 / $ca0 used by the ABI as an argument register.
Not preserved across calls.
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| CheriRegisterNumberCA1 | $c11 / $ca1 used by the ABI as an argument register.
Not preserved across calls.
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| CheriRegisterNumberCA2 | $c12 / $ca2 used by the ABI as an argument register.
Not preserved across calls.
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| CheriRegisterNumberCA3 | $c13 / $ca3 used by the ABI as an argument register.
Not preserved across calls.
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| CheriRegisterNumberCA4 | $c14 / $ca4 used by the ABI as an argument register.
Not preserved across calls.
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| CheriRegisterNumberCA5 | $c15 / $ca5 used by the ABI as an argument register.
Not preserved across calls.
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| CheriRegisterNumberPcc | The Program Counter Capability.
Special capability register used to authorize instruction fetch. The address is that of the faulting instruction. Also used for accessing read-only globals.
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| CheriRegisterNumberMtcc | Machine-mode Trap Code Capability.
Special capability register that is installed in PCC when the CPU takes a trap. The address has the same semantics as the RISC-V mtvec CSR. Only accessible when PCC has the AccessSystemRegisters permission.
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| CheriRegisterNumberMtdc | Machine-mode Tusted Data Capability.
Special capability register that contains the memory root capability on boot. Only accessible when PCC has the AccessSystemRegisters permission. Use by the RTOS to store a capability to the trusted stack.
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| CheriRegisterNumberMScratchC | Machine-mode Scratch Capability.
Special capabiltiy register that contains the sealing root capability on boot. Only accessible when PCC has the AccessSystemRegisters permission.
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| CheriRegisterNumberMepcc | Machine-mode Exception Program Counter Capability.
Special capability register that contains the PCC of the faulting instruction on trap. The address has the same semantics as the RISC-V mepc CSR. Only accessible when PCC has the AccessSystemRegisters permission.
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| CheriRegisterNumberInvalid | Indicates a value that is not used by the hardware to refer to a register.
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